Every time you use a smartphone, stream a video, or start a car, you are relying on integrated circuits – tiny chips packed with millions of transistors and interconnections, all arranged in precise three-dimensional patterns. Designing these layouts is enormously expensive and time-intensive. Yet, copying a finished chip is relatively cheap. This fundamental asymmetry – high cost to create, low cost to copy – is exactly why IP protection for integrated circuit layout-designs became a global priority, and why India enacted a dedicated law to address it.
Table of Contents
- What is a layout-design of an integrated circuit?
- Why conventional IP law falls short
- The copyright problem
- The patent problem
- The Washington Treaty: a global framework takes shape
- How TRIPS strengthened the Washington Treaty framework
- India’s response: the SICLD Act, 2000
- Key definitions under the SICLD Act
- What qualifies for protection?
- Registration procedure and the SICLD Registry
- Rights conferred by registration
- Infringement and penalties
- Why this protection matters for India’s semiconductor ambitions
- The international picture: a sui generis category comes of age
What is a layout-design of an integrated circuit?
An integrated circuit (IC) is an electronic product, in its final or intermediate form, where the elements – including at least one active element such as a transistor – and their interconnections are formed integrally in or on a piece of semiconductor material, typically silicon, to perform an electronic function. A layout-design (also called a “topography”) refers to the three-dimensional arrangement of those elements and their interconnections, however expressed, or as prepared for manufacture.
In practical terms, a layout-design is the blueprint that tells manufacturers where every transistor, resistor, diode, and connecting wire sits on a chip. Creating that blueprint requires a team of skilled engineers, specialized software, and years of iterative work. The resulting design is, in every meaningful sense, a product of intellectual effort – and it has substantial commercial value.
Why conventional IP law falls short
Before dedicated protection emerged, designers tried to fit layout-designs into existing IP categories – and found that none of them worked well.
The copyright problem
Copyright protects creative expression, not function. Because a layout-design is primarily functional – it describes how a circuit works, not just how it looks – copyright offers weak or no protection for the design itself. The geometry of transistor placement is dictated largely by engineering necessity, not artistic choice.
The patent problem
Patents require that an invention be novel, non-obvious, and industrially applicable. As noted in IP scholarship, most chip designs are evolutionary – refined versions of earlier architectures – rather than entirely novel inventions. Filing separate patents for each novel sub-component of a chip and then another for the overall design is impractical. Most layout-designs would simply fail the non-obviousness standard. As the WTO’s TRIPS training materials acknowledge, layout-designs are too functional for copyright and not inventive enough for patents – which is precisely why a sui generis (purpose-built) protection regime became necessary.
The Washington Treaty: a global framework takes shape
The first country to act was the United States, which enacted the Semiconductor Chip Protection Act in 1984. Japan followed in 1985. These national laws spurred international dialogue, leading to a diplomatic conference in Washington, D.C., in May 1989 under the auspices of WIPO. The outcome was the Treaty on Intellectual Property in Respect of Integrated Circuits (IPIC) – widely known as the Washington Treaty.
The Washington Treaty obligates each contracting party to secure IP protection for original layout-designs throughout its territory, whether or not the circuit is incorporated in an article. Crucially, the IPIC Treaty has never entered into force as an independent instrument because too few countries ratified it. However, its substantive provisions were incorporated by reference into the TRIPS Agreement through Article 35, making them binding on all WTO members.
How TRIPS strengthened the Washington Treaty framework
When TRIPS absorbed the IPIC Treaty’s provisions, it also improved on them in several ways. Under Article 35-38 of TRIPS, the minimum term of protection was raised from eight years (under the IPIC Treaty) to ten years from the date of filing or first commercial exploitation. Members may even extend this up to fifteen years from the date of creation. TRIPS also makes it clear that the exclusive right extends to articles incorporating chips that contain an unlawfully reproduced layout-design – not just the chip itself – and that innocent infringers who had no knowledge of the infringement receive more lenient treatment.
India’s response: the SICLD Act, 2000
As a WTO member bound by TRIPS, India was obligated to put in place a domestic law protecting integrated circuit layout-designs. Parliament responded by enacting the Semiconductor Integrated Circuits Layout-Design Act, 2000 (SICLD Act), which received Presidential assent on 4 September 2000, though its major provisions came into force only in 2011.
Key definitions under the SICLD Act
The Act defines a “semiconductor integrated circuit” as a product having transistors or other circuitry elements that are inseparably formed on a semiconductor or insulating material and intended to perform an electronic function. A “layout-design” under Section 2(h) means a layout of transistors and other circuitry elements – including the lead wires connecting such elements – expressed in any manner in a semiconductor integrated circuit. The Act protects the layout-design itself, not merely its embodiment in a physical chip, as Section 17 of the Act explicitly clarifies.
What qualifies for protection?
Not every layout-design can be registered. Under the SICLD Act, a design must satisfy three conditions to be eligible:
- Originality: The design must result from the creator’s own intellectual effort and must not be commonly known among layout-design creators and IC manufacturers at the time of creation. Even a combination of commonly known elements can qualify as original if the combination itself is the product of the creator’s own effort.
- Inherent distinctiveness: The design must be distinguishable from other registered layout-designs.
- Limited commercial exploitation: A design that has already been commercially exploited – anywhere in India or in a convention country – for more than two years before the application date cannot be registered.
Registration procedure and the SICLD Registry
Any person wishing to protect a layout-design must apply in writing to the Semiconductor Integrated Circuits Layout-Design Registry, which functions under the Ministry of Electronics and Information Technology. A three-dimensional representation of the layout-design is required along with the application. The Registrar scrutinises the application and may accept it absolutely, accept it with modifications, or refuse it. Once registered, the date of the original application is treated as the date of registration, and the Registrar issues a certificate sealed with the Registry’s seal.
Rights conferred by registration
Registration confers exclusive rights for ten years from the date of application or first commercial exploitation, whichever is earlier. These rights give the registered owner full control to:
- Reproduce the layout-design, in whole or in part, for commercial purposes.
- Import, sell, or otherwise distribute the layout-design or any semiconductor integrated circuit or article incorporating it.
- Commercially exploit the design in any form.
Registration also serves as prima facie evidence of validity in any legal proceedings. Assignment and licensing of the registered layout-design are expressly permitted under the Act.
Infringement and penalties
The SICLD Act takes a firm stance on enforcement. Wilful infringement – which includes unauthorised reproduction, import, or sale of a protected layout-design – is a criminal offence punishable under Section 56 with imprisonment of up to three years, a fine ranging from โน50,000 to โน10,00,000, or both. Civil remedies include injunctions and damages. A complaint must be filed before a Court of Judicial Magistrate First Class.
One notable provision in the Act concerns reverse engineering. If a person creates a new layout-design by scientifically evaluating or analysing an existing registered design, and the subsequent design is itself original, using that new design is not considered infringement. This balances protection of investment with the freedom to build on existing technology – a nuance that reflects the realities of how chip design actually progresses.
Why this protection matters for India’s semiconductor ambitions
India’s semiconductor ecosystem has historically been oriented towards chip design services rather than fabrication. Design talent is abundant; protection of that design talent is what the SICLD Act is meant to ensure. With the India Semiconductor Mission launched in 2021, the government has committed to building domestic semiconductor fabrication and design capacity. As scholars have observed, this mission is expected to drive a significant uptick in layout-design registrations, which have so far remained low despite the law being on the books for over two decades.
The logic for robust protection is straightforward: developing an original chip layout can cost millions of rupees and take several years. Without legal recourse, a competitor could reverse-engineer and copy that design at a fraction of the cost, completely eroding the original designer’s return on investment. IP protection converts that design effort into an exclusive commercial asset – which in turn makes investment in semiconductor innovation economically rational.
The international picture: a sui generis category comes of age
India is not alone in having adopted a dedicated regime. The US Semiconductor Chip Protection Act of 1984, the EU Directive on the legal protection of topographies of semiconductor products, Japan’s Circuit Layout Right Act, and dozens of similar national laws collectively reflect a global consensus: layout-designs do not fit neatly into any pre-existing IP category and require their own framework. The TRIPS Agreement’s incorporation of the Washington Treaty’s provisions made this sui generis protection a baseline obligation for all 164 WTO members, ensuring a minimum standard of protection for semiconductor innovation worldwide.
For a country like India – which is positioning itself as a global hub for chip design and, increasingly, fabrication – having a functioning and well-understood layout-design protection regime is not a legal technicality. It is a precondition for attracting investment, retaining talent, and making semiconductor innovation commercially viable.
What do you think? Given that registrations under India’s SICLD Act have remained low despite the law being in force for over two decades, what practical reforms – whether in the registration process, awareness, or enforcement – do you think could make the Act more effective for India’s growing semiconductor design industry? And as chip designs become increasingly generated or optimised with the help of AI tools, should the originality requirement under the Act be reconsidered to account for human-AI collaboration in the design process?
References
- https://www.wipo.int/en/web/patents/topics/integrated_circuits
- https://iptse.com/an-introduction-to-semiconductor-integrated-circuits-layout-designs-act-2000-by-raunaq-bali/
- https://www.wto.org/english/tratop_e/trips_e/ta_docs_e/modules6_e.pdf
- https://www.wipo.int/wipolex/en/text/295136
- https://en.wikipedia.org/wiki/Integrated_circuit_layout_design_protection
- https://www.wto.org/english/tratop_e/trips_e/intel2_e.htm
- https://www.indiacode.nic.in/handle/123456789/1998?locale=en
- https://blog.ipleaders.in/semiconductor-integrated-circuit-layout-design-act-2000/
- https://sicldr.gov.in/sicw/about
- https://corpotechlegal.com/semiconductor-layout-design-act-2000/
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